//
// memory.C
//
// Description:
//  Implements memory stage of the AD-MIPS pipeline.
//
// Version:
//      $Id$
//
// Revision:
//      $Log$
//
// Author:
//  Brian J. Alliet
//  Jonathon W. Donaldson
//

#include "includes.h"

void memory() {

    // Setup alias
    StorageObject& ex_mem_aluout = dmem.MAR();

    // copy IR to next stage
    mem_ir_bus.IN().pullFrom(ex_mem_ir);
    mem_wb_ir.latchFrom(mem_ir_bus.OUT());

    // copy ALUout to next stage
    mem_aluout_bus.IN().pullFrom(ex_mem_aluout);
    mem_wb_aluout.latchFrom(mem_aluout_bus.OUT());

    unsigned long op = OP(ex_mem_ir);
    switch(op) {
         case I_O_SB:
         case I_O_SH:
         case I_O_SW:
         case I_O_SWC0:
             // the MAR is already setup b/c of the alias setup above
             dmem.WRITE().pullFrom(ex_mem_rt);
             dmem.perform(op == I_O_SB ? Memory::writeBOp : op == I_O_SH ? Memory::writeHOp : Memory::writeOp);
             break;

         case I_O_LB:
         case I_O_LH:
         case I_O_LW:
         case I_O_LBU:
         case I_O_LHU:
         case I_O_LWC0:
            // the MAR is already setup b/c of the alias setup above
            mem_wb_lmd.latchFrom(dmem.READ());
            dmem.perform(op == I_O_LB ? Memory::readBOp : op == I_O_LH ? Memory::readHOp : op == I_O_LBU ? Memory::readBUOp : op == I_O_LHU ? Memory::readHUOp : Memory::readOp);
            break;
    
        case I_O_LWC1:
        case I_O_SWC1:
            /* nop for now */
            break;

    }
}